- minimization by Boolean functions
- Макаров: логическое преобразование в целях минимизации связей алгоритма
Универсальный англо-русский словарь. Академик.ру. 2011.
minimization by Boolean functions
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Canonical form (Boolean algebra) — In Boolean algebra, any Boolean function can be expressed in a canonical form using the dual concepts of minterms and maxterms. Minterms are called products because they are the logical AND of a set of variables, and maxterms are called sums… … Wikipedia
DFA minimization — In computer science, more specifically in the branch of automata theory, DFA minimization is the task of transforming a given deterministic finite automaton (DFA) into an equivalent DFA that has minimum number of states. Here, two DFAs are called … Wikipedia
Education and training of electrical and electronics engineers — Both electrical and electronics engineers typically possess an academic degree with a major in electrical/ electronics engineering. The length of study for such a degree is usually three or four years and the completed degree may be designated as … Wikipedia
Espresso heuristic logic minimizer — The Espresso logic minimizer is a computer program using heuristic and specific algorithms for efficiently reducing the complexity of digital electronic gate circuits.[1] Espresso was developed at IBM by Robert Brayton. Rudell later published the … Wikipedia
Truth table — A truth table is a mathematical table used in logic specifically in connection with Boolean algebra, boolean functions, and propositional calculus to compute the functional values of logical expressions on each of their functional arguments, that … Wikipedia
Quine–McCluskey algorithm — The Quine–McCluskey algorithm (or the method of prime implicants) is a method used for minimization of boolean functions which was developed by W.V. Quine and Edward J. McCluskey. It is functionally identical to Karnaugh mapping, but the tabular… … Wikipedia
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Logic optimization — a part of logic synthesis, is the process of finding an equivalent representation of the specified logic circuit under one or more specified constraints. Generally the circuit is constrained to minimum chip area meeting a prespecified delay.… … Wikipedia
Karnaugh map — For former radio station KMAP (1962 1968) in Dallas Fort Worth, see KRLD FM. An example Karnaugh map The Karnaugh map (K map for short), Maurice Karnaugh s 1953 refinement of Edward Veitch s 1952 Veitch diagram, is a method to simplify Boolean… … Wikipedia
Digital electronics — Main articles: Electronics and Electronic circuit Digital electronics represent signals by discrete bands of analog levels, rather than by a continuous range. All levels within a band represent the same signal state. Relatively small changes to… … Wikipedia
Logic synthesis — is a process by which an abstract form of desired circuit behavior (typically register transfer level (RTL) or behavioral) is turned into a design implementation in terms of logic gates. Common examples of this process include synthesis of HDLs,… … Wikipedia
